The Semiconductor Integrated Circuits Layout-Design Act, 2000

Summary of the Semiconductor Integrated Circuit Layout-Design Act, 2000
Key Provisions
1. Definitions (Section 2)
• Layout-Design: A layout of transistors and other circuitry elements in a semiconductor integrated circuit.
• Commercial Exploitation: Selling, leasing, offering for sale, or distributing for commercial purposes.
• Registered Proprietor: The person entered in the register as the proprietor of the layout-design.
2. Registration Process (Sections 8-14)
Application: By the creator in the prescribed manner to the Registrar.
Filing: At the appropriate Semiconductor Integrated Circuits Layout-Design Registry office based on the applicant's location.
Advertisement: Of the application after acceptance.
Opposition: Allowed within three months of advertisement, with a counter-statement required from the applicant.
Registration: Upon successful opposition process or lack thereof, with a certificate issued.
Duration: Registration is for 10 years from the date of application filing or first commercial exploitation, whichever is earlier.
3. Conditions of Registration (Section 7)
*Originality: The layout-design must be original, not commonly known, and the result of the creator's intellectual efforts. *Non-Prior Commercial Exploitation: Except for up to two years before application in India or a convention country. *Distinctiveness: Must be inherently distinctive and distinguishable from other registered layouts.
4. Effects of Registration (Section 16-18)
Exclusive Rights: The registered proprietor has exclusive rights to use the layout-design and seek relief for infringement.
Infringement: Defined as reproducing, importing, selling, or distributing without permission, with exceptions for scientific evaluation, analysis, research, or teaching.
5. Offences, Penalties, and Procedure (Sections 56-62)
• Infringement Penalty: Up to 3 years imprisonment, or a fine of ₹50,000 to ₹10,000,000, or both.
• Falsely Representing Registration: Up to 6 months imprisonment, or a fine up to ₹50,000, or both.
• Forfeiture of Goods: Court may direct forfeiture of goods used in the commission of an offence.
• Exemptions and Procedures: For certain employees, and procedures for pleading invalid registration.
6. Appellate and Judicial Procedures (Sections 52-55)
Appellate Board: Established under the Act, with transitional provisions until its setup, the Intellectual Property Appellate Board (under the Trade Marks Act, 1999) exercises jurisdiction.
Appeals to High Court: Against decisions of the Appellate Board, with the High Court having the power to make rules.

Legislative History:

The Semiconductor Integrated Circuits Layout-Design Act, 2000

Act Title - The Semiconductor Integrated Circuits Layout-Design Act, 2000

Act Number /Year - 37 of 2000

Act ID (India Code) - 200037

Presidential Assent

Date - September 4, 2000

Enforcement Date - May 1, 2004

Nodal Ministry - Ministry of Electronics and Information Technology (MeitY)

Precedent & Historical Rationale

Protection of Intellectual Property in Semiconductor Design:

Prior to the turn of the millennium, India's intellectual property framework covered patents, copyrights, trademarks, and industrial designs, but lacked specialized statutory protection for the layout-designs of semiconductor integrated circuits.

With rapid advancements in microelectronics, very-large-scale integration (VLSI), and semiconductor design, creators faced high risks of intellectual piracy and unauthorized commercial exploitation of layout-designs without a dedicated legal recourse.

Fulfillment of International Obligations and Fostering Innovation:

The legislative intent centered on aligning India's domestic IP regime with international standards—specifically under the TRIPS Agreement—and creating a statutory registration and protection mechanism to encourage research, foreign investment, and indigenous design development in the domestic semiconductor industry.

Parliamentary Trajectory & Enactment

Formulation:

Drafted to establish a formal registry, define layout-design rights, specify criteria for protection, and set penalties for infringement of proprietary semiconductor circuits.

Parliamentary Passage:

Introduced and passed by both Houses of Parliament during the monsoon session of 2000.

Presidential Assent: Received Presidential Assent on September 4, 2000.

Enforcement: Enforced on May 1, 2004.

Source: Official Records of Parliament, India Code, and Ministry of Electronics and Information Technology.